AES hardware implementation.

Address space limited to 26-bits.

CRC32 hardware implementation.

MaverickCrunch context switching and handling.

DSP Extensions support.

Event stream support.

32-bit operand, 64-bit result multiplication support.

Floating point arithmetic support.

Half-word load and store support.

Integer divide instruction support in ARM mode.

Integer divide instruction support in Thumb mode.

Intel Wireless MMX technology support.

Java instruction set.

Large Physical Address Extensions.

NEON instruction set.

Polynomial multiplication instruction set.

SHA1 hardware implementation.

SHA2 hardware implementation.

SWP instruction support.

ARM Thumb instruction set.

Thumb EE instruction set.

Thread local storage support.

Vector floating point support.

Vector floating point version 3 D15-D31.

Vector floating point version 3 support.

Vector floating point version 3 D8-D15.

Vector floating point version 4 support.