Package acc gives an access to the Access Control registers.

Package cmt provides an access to the Cache maintenance registers.

Package fpu gives an access to Floating Point Unit registers.

Package mpu provides interface to configure Cortex-M Memory Protection Unit.

Package nvic allows to control Nested Vectored Interrupt Controller.

Package pft provides an access to the Processor features registers.

Peripheral: SCB_Periph System Control Block Instances: SCB 0xE000ED00 Registers: 0x00 32 CPUID CPUID Base Register 0x04 32 ICSR Interrupt Control and State Register 0x08 32 VTOR Vector Table Offset Register 0x0C 32 AIRCR Application Interrupt and Reset Control Register 0x10 32 SCR System Control Register 0x14 32 CCR Configuration and Control Register 0x18 32 SHPR1 System Handler Priority Register 1 0x1C 32 SHPR2 System Handler Priority Register 2 0x20 32 SHPR3 System Handler Priority Register 3 0x24 32 SHCSR System Handler Control and State Register 0x28 32 CFSR Configurable Fault Status Register 0x2C 32 HFSR HardFault Status Register 0x34 32 MMFR MemManage Fault Address Register 0x38 32 BFAR BusFault Address Register 0x3C 32 AFSR Auxiliary Fault Status Register.

Package systick gives an access to System Timer registers.

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BASEPRIO returns current value of BASEPRI register.

BKPT inserts Breakpoint instruction.

ClearFAULTMASK reverts SetFAULTMASK.

ClearPRIMASK reverts SetPRIMASK.

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DMB inserts Data Memory Barrier instruction.

DSB inserts Data Synchronization Barrier instruction.

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FAULTMASK returns true if all exceptions other than NMI are disabled.

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ISB inserts Instruction Synchronization Barrier instruction.

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PRIMASK returns true if all exceptions with configurable priority are disabled.

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SetBASEPRI sets BASEPRI register.

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SetFAULTMASK disables all exceptions other than NMI.

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SetPRIMASK disables all exceptions with configurable priority.

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SEV inserts Signal Event instruction.

SVC inserts Supervisor Call instruction.

WFE inserts Wait For Event instruction.

WFI inserts Wait For Interrupt instruction.

BasicFrame: if set there is no floating-point state saved on stack.

Cortex-M exception numbers.

Cortex-M exception numbers.

Floating-point context active.

Cortex-M exception numbers.

Exception number for first external interrupt.

Cortex-M exception numbers.

Cortex-M exception numbers.

Cortex-M exception numbers.

Lowest and highest exception priority.

Lowest and highest exception priority.

Lowest and highest exception priority.

Lowest and highest exception priority.

Cortex-M exception numbers.

ReturnHandler: exception will return to handler mode.

ReturnMask: selects bits that can be compared with Return* constants.

ReturnMSP: exception will return to thread mode using MSP .

ReturnPSP: exception will return to thread mode using PSP.

Cortex-M exception numbers.

Cortex-M exception numbers.

Unprivileged thread mode.

Cortex-M exception numbers.

Use PSP for in thread mode.

StackFrame represents Cortex-M exception stack frame (without floating-point state).

StackFrameFP represents Cortex-M stack frame including floating-point state.