package
0.0.0-20211205205814-168ccc21e67c
Repository: https://github.com/ziutek/emgo.git
Documentation: pkg.go.dev
# Constants
+.
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+ HSE Clock Security System enable.
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+ HPRE[3:0] bits (AHB prescaler).
SYSCLK not divided.
SYSCLK divided by 128.
SYSCLK divided by 16.
SYSCLK divided by 2.
SYSCLK divided by 256.
SYSCLK divided by 4.
SYSCLK divided by 512.
SYSCLK divided by 64.
SYSCLK divided by 8.
+ External High Speed oscillator (HSE) clock bypass.
+ External High Speed oscillator (HSE) clock enable.
+ External High Speed oscillator (HSE) clock ready.
+.
+.
+.
+ HSI16 Automatic Start from Stop.
+ HSICAL[7:0] bits.
+ Internal High Speed oscillator (HSI16) clock enable for some IPs Kernel.
+ Internal High Speed oscillator (HSI16) clock enable.
+ Internal High Speed oscillator (HSI16) clock ready flag.
+.
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+ HSITRIM[4:0] bits.
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+ MCO prescaler.
MCO is divided by 1.
MCO is divided by 16.
MCO is divided by 2.
MCO is divided by 4.
MCO is divided by 8.
+ MCOSEL [2:0] bits (Clock output selection).
+ MSICAL[7:0] bits.
+ Internal Multi Speed oscillator (MSI) clock enable.
+ Internal Multi Speed oscillator (MSI) PLL enable.
+ Internal Multi Speed oscillator (MSI) clock Range.
+ Internal Multi Speed oscillator (MSI) clock ready flag.
+.
+.
+.
+ Internal Multi Speed oscillator (MSI) range selection.
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+ MSITRIM[7:0] bits.
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+ System PLL clock enable.
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+ System PLL clock ready.
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+ SAI1 PLL enable.
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+ SAI1 PLL ready.
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+ SAI2 PLL enable.
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+ SAI2 PLL ready.
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+.
HSE oscillator source clock selected.
HSI16 oscillator source clock selected.
MSI oscillator source clock selected.
+ PRE1[2:0] bits (APB2 prescaler).
HCLK not divided.
HCLK divided by 16.
HCLK divided by 2.
HCLK divided by 4.
HCLK divided by 8.
+ PRE2[2:0] bits (APB2 prescaler).
HCLK not divided.
HCLK divided by 16.
HCLK divided by 2.
HCLK divided by 4.
HCLK divided by 8.
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+ Wake Up from stop and CSS backup clock selection.
+ SW[1:0] bits (System clock Switch).
HSE oscillator selection as system clock.
HSI16 oscillator selection as system clock.
MSI oscillator selection as system clock.
PLL selection as system clock.
+.
+.
+.
+.
+ SWS[1:0] bits (System Clock Switch Status).
HSE oscillator used as system clock.
HSI16 oscillator used as system clock.
MSI oscillator used as system clock.
PLL used as system clock.
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# Variables
emgo:const.