Categorygithub.com/ziutek/emgoegpathsrcstm32ol476xxmmap
package
0.0.0-20211205205814-168ccc21e67c
Repository: https://github.com/ziutek/emgo.git
Documentation: pkg.go.dev
Versions
1
Dependencies
0
Dependents
0
Files
160 SLOC

# Constants

AHB2 peripherals.
AHB2 peripherals.
AHB2 peripherals.
AHB2 peripherals.
Peripheral memory map.
Peripheral memory map.
Peripheral memory map.
Peripheral memory map.
APB1 peripherals.
APB2 peripherals.
APB2 peripherals.
AHB1 peripherals.
APB1 peripherals.
APB1 peripherals.
FMC Banks registers base address.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
APB2 peripherals.
APB2 peripherals.
FLASH(up to 1 MB) base address.
AHB1 peripherals.
Flash size data register base address.
Peripheral memory map.
Peripheral memory map.
Peripheral memory map.
Peripheral memory map.
Peripheral memory map.
FMC Banks registers base address.
FMC Banks registers base address.
Peripheral memory map.
FMC Banks registers base address.
FMC base address.
FMC control registers base address.
AHB2 peripherals.
AHB2 peripherals.
AHB2 peripherals.
AHB2 peripherals.
AHB2 peripherals.
AHB2 peripherals.
AHB2 peripherals.
AHB2 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
Package data register base address.
Peripheral base address.
Peripheral base address in the bit-band region.
APB1 peripherals.
QSPI memories accessible over AHB base address.
QUADSPI control registers base address.
AHB1 peripherals.
AHB2 peripherals.
APB1 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB1 peripherals.
APB1 peripherals.
SRAM1(up to 96 KB) base address.
SRAM1(96 KB) base address in the bit-band region.
maximum SRAM1 size (up to 96 KBytes).
SRAM2(32 KB) base address.
SRAM2(32 KB) base address in the bit-band region.
SRAM2 size (32 KBytes).
APB1 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB2 peripherals.
AHB1 peripherals.
APB1 peripherals.
APB1 peripherals.
Unique device ID register base address.
APB2 peripherals.
APB1 peripherals.
APB1 peripherals.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
AHB2 peripherals.
APB2 peripherals.
APB1 peripherals.