Categorygithub.com/ziutek/emgoegpathsrcstm32of746xxmmap
package
0.0.0-20211205205814-168ccc21e67c
Repository: https://github.com/ziutek/emgo.git
Documentation: pkg.go.dev
Versions
1
Dependencies
0
Dependents
0
Files
153 SLOC

# Constants

APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
Peripheral memory map.
Peripheral memory map.
Peripheral memory map.
Peripheral memory map.
Base address of : Backup SRAM(4 KB).
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
AHB1 peripherals.
APB1 peripherals.
FMC Bankx registers base address.
AHB2 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
APB2 peripherals.
FLASH end address.
AHB1 peripherals.
Base address of : (up to 1 MB) embedded FLASH memory accessible over AXI.
Base address of : (up to 1 MB) embedded FLASH memory accessible over ITCM.
FLASH Size register base address.
FMC Bankx registers base address.
FMC Bankx registers base address.
FMC Bankx registers base address.
FMC Bankx registers base address.
Base address of : FMC Control registers.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
Package size register base address.
Base address of : AHB/ABP Peripherals.
APB1 peripherals.
Base address of : QSPI memories accessible over AXI.
Base address of : QSPI Control registers.
Base address of : 64KB system data RAM accessible over DTCM.
Base address of : 16KB RAM reserved for CPU execution/instruction accessible over ITCM.
AHB1 peripherals.
AHB2 peripherals.
APB1 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB1 peripherals.
APB2 peripherals.
APB1 peripherals.
APB1 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
Base address of : 240KB RAM1 accessible over AXI/AHB.
Base address of : 16KB RAM2 accessible over AXI/AHB.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB2 peripherals.
APB2 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
Unique device ID register base address.
APB2 peripherals.
APB1 peripherals.
APB1 peripherals.
APB2 peripherals.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
USB registers base address.
APB1 peripherals.