+ Bidirectional data mode enable.

+ Output enable in bidirectional mode.

+ BR[2:0] bits (Baud Rate Control).

+ Busy flag.

+ Channel length (number of bits per audio channel).

+ Channel side.

+ steady state clock polarity.

+ Clock Phase.

+ Clock Polarity.

+ Hardware CRC calculation enable.

+ CRC Error flag.

+ Transmit CRC next.

+ CRC polynomial register.

+ DATLEN[1:0] bits (Data length to be transferred).

+ Data Frame Format.

+ Error Interrupt Enable.

+ Frame format error flag.

+ Frame Format.

+ I2SCFG[1:0] bits (I2S configuration mode).

+ I2S Linear prescaler.

+ I2S Enable.

+ I2S mode selection.

+ I2SSTD[1:0] bits (I2S standard selection).

+ Frame Format.

+ Master Clock Output Enable.

+ Mode fault.

+ Master Selection.

+ Odd factor for the prescaler.

+ Overrun flag.

+ PCM frame synchronization.

+ Rx CRC Register.

+ Rx Buffer DMA Enable.

+ Receive buffer Not Empty.

+ RX buffer Not Empty Interrupt Enable.

+ Receive only.

+ SPI Enable.

+ Internal slave select.

+ Software slave management.

+ SS Output Enable.

+ Tx CRC Register.

+ Tx Buffer DMA Enable.

+ Transmit buffer Empty.

+ Tx buffer Empty Interrupt Enable.

+ Underrun flag.

emgo:const.

emgo:const.

emgo:const.

emgo:const.

emgo:const.

emgo:const.

emgo:const.