+ Refer to AN4073 on how to use this bit.

+ Backup regulator enable.

+ Backup regulator ready.

+ Clear Standby Flag.

+ Clear Wakeup Flag.

+ Disable Backup Domain write protection.

+ Enable WKUP pin.

+ Flash Interface Stop while System Run.

+ Flash Memory Sleep System Run.

+ Flash power down in Stop mode.

+ Low-Power Deepsleep.

Low-power regulator Low Voltage in Deep Sleep mode.

+ Low-Power Regulator in Stop under-drive mode.

Main regulator Low Voltage in Deep Sleep mode.

+ Main regulator in Stop under-drive mode.

+ Over Drive enable.

+ Over Drive generator ready.

+ Over Drive switch enabled.

+ Over Drive Switch ready.

+ Power Down Deepsleep.

+ PLS[2:0] bits (PVD Level Selection).

Bit 0.

Bit 1.

Bit 2.

PVD level 0.

PVD level 1.

PVD level 2.

PVD level 3.

PVD level 4.

PVD level 5.

PVD level 6.

PVD level 7.

+ Power Voltage Detector Enable.

+ PVD Output.

+ Standby Flag.

+ Under Drive enable in stop mode.

Bit 0.

Bit 1.

+ Under Drive ready.

+ VOS[1:0] bits (Regulator voltage scaling output selection).

Bit 0.

Bit 1.

+ Regulator voltage scaling output selection ready.

+ Wakeup Flag.

+ WKUP pin Polarity.

emgo:const.