Categorygithub.com/ziutek/emgoegpathsrcstm32of40_41xxxmmap
package
0.0.0-20211205205814-168ccc21e67c
Repository: https://github.com/ziutek/emgo.git
Documentation: pkg.go.dev
Versions
1
Dependencies
0
Dependents
0
Files
136 SLOC

# Constants

APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
Peripheral memory map.
Peripheral memory map.
Peripheral memory map.
Peripheral memory map.
Backup SRAM(4 KB) base address in the alias region.
Backup SRAM(4 KB) base address in the bit-band region.
APB1 peripherals.
APB1 peripherals.
CCM(core coupled memory) data RAM(64 KB) base address in the alias region.
CCM(core coupled memory) data RAM(64 KB) base address in the bit-band region.
AHB1 peripherals.
AHB2 peripherals.
APB1 peripherals.
FSMC Bankx registers base address.
AHB2 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
APB2 peripherals.
FLASH(up to 1 MB) base address in the alias region.
AHB1 peripherals.
FSMC Bankx registers base address.
FSMC Bankx registers base address.
FSMC Bankx registers base address.
FSMC Bankx registers base address.
FSMC Bankx registers base address.
FSMC registers base address.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB1 peripherals.
AHB2 peripherals.
AHB2 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
Peripheral base address in the alias region.
Peripheral base address in the bit-band region.
APB1 peripherals.
AHB1 peripherals.
AHB2 peripherals.
APB1 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB1 peripherals.
APB1 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
SRAM1(112 KB) base address in the alias region.
SRAM1(112 KB) base address in the bit-band region.
SRAM2(16 KB) base address in the alias region.
SRAM2(16 KB) base address in the bit-band region.
SRAM3(64 KB) base address in the alias region.
SRAM3(64 KB) base address in the bit-band region.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB2 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB2 peripherals.
APB2 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB1 peripherals.
APB2 peripherals.
APB1 peripherals.
APB1 peripherals.
APB2 peripherals.
APB1 peripherals.