package
0.0.0-20211205205814-168ccc21e67c
Repository: https://github.com/ziutek/emgo.git
Documentation: pkg.go.dev
# Constants
+ ADC calibration.
+ ADC disable.
+ ADC enable.
+ ADC ready flag.
+ ADC ready interrupt.
+ ADC group regular conversion start.
+ ADC group regular conversion stop.
+ ADC data alignement.
+ ADC low power auto power off.
+ ADC analog watchdog 1 flag.
+ ADC analog watchdog 1 monitored channel selection.
+ ADC analog watchdog 1 enable on scope ADC group regular.
+ ADC analog watchdog 1 interrupt.
+ ADC analog watchdog 1 monitoring a single channel or all channels.
+ ADC group regular sequencer channels, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 0, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 1, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 10, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 11, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 12, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 13, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 14, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 15, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 16, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 17, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 18, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 2, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 3, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 4, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 5, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 6, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 7, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 8, available when ADC_CFGR1_CHSELRMOD is reset.
ADC group regular sequencer channel 9, available when ADC_CFGR1_CHSELRMOD is reset.
+ ADC clock source and prescaler (prescaler only for clock source synchronous).
+ ADC group regular continuous conversion mode.
+ ADC group regular conversion data.
+ ADC group regular sequencer discontinuous mode.
+ ADC DMA transfer configuration.
+ ADC DMA transfer enable.
+ ADC group regular end of unitary conversion flag.
+ ADC group regular end of unitary conversion interrupt.
+ ADC group regular end of sequence conversions flag.
+ ADC group regular end of sequence conversions interrupt.
+ ADC group regular end of sampling flag.
+ ADC group regular end of sampling interrupt.
+ ADC group regular external trigger polarity.
+ ADC group regular external trigger source.
+ ADC Analog watchdog 1 threshold high.
+ ADC analog watchdog 1 threshold low.
+ ADC group regular overrun flag.
+ ADC group regular overrun interrupt.
+ ADC group regular overrun configuration.
+ ADC data resolution.
+ ADC group regular sequencer scan direction.
+ ADC group of channels sampling time 2.
+ ADC internal path to temperature sensor enable.
+ ADC internal path to VrefInt enable.
+ ADC low power auto wait.