package
0.0.0-20211205205814-168ccc21e67c
Repository: https://github.com/ziutek/emgo.git
Documentation: pkg.go.dev

# Constants

Switch mode to Active.
Switch PLL output to 36 MHz.
Switch PLL output to 48 MHz (default).
Select PLL external clock source.
Send reset pulse to FT80x core.
Switch off LDO, Clock, PLL and Oscillator.
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Switch mode to Sleep: PLL and Oscillator off.
Switch mode to Standby: PLL and Oscillator on.