EncodeRegisterRange packs [reg0-reg1] list into 64-bit value that is intended to be stored inside obj.Addr.Offset with TYPE_REGLIST.

ParseSuffix handles the special suffix for the 386/AMD64.

>= unsigned.

< unsigned.

== (zero).

>= signed.

> signed.

> unsigned.

<= signed.

<= unsigned.

< signed.

sign bit set (negative).

!= (nonzero).

overflow clear.

overflow set.

parity clear.

sign bit clear (positive).

parity set.

first external register.

first register variable.

32-bit only.

symbolic: exact value doesn't matter.

byte operands.

operand escape.

xmm escape 2 with 16-bit prefix: 66 f3 0f.

xmm escape 1: f2 0f.

xmm escape 2: f3 0f.

Pf3 with Rex.w: f3 48 0f.

2byte opcode escape.

both escapes: 66 0f.

xmm escape 3: 66 48 0f.

xmm escape 4: 66 0F 38.

Pq4 with Rex.w 66 0F 38.

xmm escape 5: F3 0F 38.

Pq5 with Rex.w F3 0F 38.

Rex.w.

symbolic; exact value doesn't matter.

symbolic; exact value doesn't matter.

defaults to 64-bit mode.

symbolic; exact value doesn't matter.

symbolic; exact value doesn't matter.

global descriptor table register.

interrupt descriptor table register.

local descriptor table register.

machine status word.

task register.

compiler allocates external registers R15 down.

extend modrm r/m, sib base, or opcode reg.

extend modrm reg.

AVX512 extension to REX.R/VEX.R.

=1, 64-bit operand size.

extend sib index.

$0.

$1.

$x, x fits in int8.

K0..K7; used for KOP.

K0.

Yk+Ym; used for KOP.

K1..K7; write mask.

Yrl on 32-bit system.

$x, x fits in uint2.

$x, x in 0..127 (fits in both int8 and uint8).

$x, x fits in uint8.

YxrEvex+Ym.

X0..X15.

X0 only.

X0..X31.

[ X<n> - X<n+3> ]; multisource YxrEvex.

VSIB vector array; vm32x/vm64x.

Yxvm which permits High-16 X register as index.

YyrEvex+Ym.

Y0..Y15.

Y0..Y31.

[ Y<n> - Y<n+3> ]; multisource YyrEvex.

VSIB vector array; vm32y/vm64y.

Yyvm which permits High-16 Y register as index.

Yzr+Ym.

Z0..Z31.

[ Z<n> - Z<n+3> ]; multisource YzrEvex.

VSIB vector array; vm32z/vm64z.

mmx1,mmx2/mem64,imm8.