aliases.

64-bit */.

hardware nop.

64-bit FP */.

MSA */.

-0x8000 <= v < 0 */.

0 < v <= 0xFFFF */.

$n(REG) where int32 < n */.

other 64 (could subdivide further) */.

$n(REG) where int16 < n <= int32 */.

other 32 */.

special processor register */.

must be the last */.

$n(REG) where n <= int16 */.

16 bit signed */.

$tlsvar */.

32 bit signed, low 16 bits 0 */.

MSA registers */.

only schedule branch */.

uses offset and size */.

uses offset and size */.

mark flags */.

number of floating point registers */.

p expands to multiple instructions, but does NOT use REGTMP.

number of general registers */.

* mips 64 */.

* mips 64 */.

number of MSA registers */.

must be a multiple of 32.

must be a multiple of 32.

the last defined register.

must be a multiple of 32.

must be a multiple of 32.

must be a multiple of 32.

-1 disables passing the first argument in register */.

context for closures */.

G */.

reserved for runtime, duffzero and duffcopy */.

reserved for runtime, duffcopy */.

used by the linker */.

set to zero */.

https://llvm.org/svn/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td search for DwarfRegNum https://gcc.gnu.org/viewcvs/gcc/trunk/gcc/config/mips/mips.c?view=co&revision=258099&content-type=text%2Fplain search for mips_dwarf_regno For now, this is adequate for both 32 and 64 bit.