# Functions
PPC64LEMaxRegNum is 172 registers in total, across 4 categories: General Purpose Registers or GPR (32 GPR + 9 special registers) Floating Point Registers or FPR (32 FPR + 1 special register) Altivec/VMX Registers or VMX (32 VMX + 2 special registers) VSX Registers or VSX (64 VSX) Documentation: https://lldb.llvm.org/cpp_reference/RegisterContextPOSIX__ppc64le_8cpp_source.html.
# Constants
k1 through k7 follow.
ST(1) through ST(7) follow.
XMM1 through XMM15 follow.
XMM17 through XMM31 follow.
also X29.
also X30.
V1 through V31 follow.
X1 through X30 follow.
ST(1) through ST(7) follow.
XMM1 through XMM7 follow.
Condition Registers: from CR0 to CR7.
Floating point registers: from F0 to F31.
General Purpose Registers: from R0 to R31.
Vector (Altivec/VMX) registers: from V0 to V31.
Vector Scalar (VSX) registers: from VS32 to VS63 On ppc64le these are mapped to F0 to F31.
Link register.
The documentation refers to this as the CIA (Current Instruction Address).
Stack frame pointer: Gpr[1].
Floating-point Registers.
Frame Pointer.
Link Register.
Not defined in DWARF specification.
G Register.
Stack Pointer.
Integer Registers.