aliases.

* Do not reorder or fragment the conditional branch * opcodes, or the predication code will break */.

MRC/MCR.

reference to relocatable address */.

float insn offset (0 to 0x3fc, word aligned) */.

psr flags-only */.

halfword insn offset (-0xff to 0xff) */.

both H and F */.

Large Auto CONstant, i.e.

must be the last */.

~RCON */.

scond byte */.

<=0xff rotated constant offset from auto */.

0xff rotated */.

OR of two disjoint C_RCON constants */.

subtraction of two disjoint C_RCON constants */.

-0xfff to 0xfff */.

scond byte */.

0xffff */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

scond byte */.

These constants are the ARM condition codes encodings, XORed with 14 so that C_SCOND_NONE has value 0, so that a zeroed Prog.scond means "always execute".

register shift R>>x */.

memory address with shifted offset R>>x(R) */.

REG_MB_SY */.

both nil and R */.

TLS "var" in initial exec mode: will become a memory address (chosen by the program linker) that the dynamic linker will fill with the offset from the thread local base.

TLS "var" in local exec mode: will become a constant offset from thread local base that is ultimately chosen by the program linker.

up bit, unsigned bit */.

scond byte */.

Prog.mark.

compiler allocates register variables F0 up */ compiler allocates external registers F7 down */.

Prog.mark.

Prog.mark.

Special registers, after subtracting obj.RBaseARM, bit 9 indicates a special register and the low bits select the register.

must be 2-aligned.

must be 16-aligned.

must be 2-aligned.

Special registers, after subtracting obj.RBaseARM, bit 9 indicates a special register and the low bits select the register.

Special registers, after subtracting obj.RBaseARM, bit 9 indicates a special register and the low bits select the register.

Special registers, after subtracting obj.RBaseARM, bit 9 indicates a special register and the low bits select the register.

Special registers, after subtracting obj.RBaseARM, bit 9 indicates a special register and the low bits select the register.

Special registers, after subtracting obj.RBaseARM, bit 9 indicates a special register and the low bits select the register.

Special registers, after subtracting obj.RBaseARM, bit 9 indicates a special register and the low bits select the register.

Special registers, after subtracting obj.RBaseARM, bit 9 indicates a special register and the low bits select the register.

Special registers, after subtracting obj.RBaseARM, bit 9 indicates a special register and the low bits select the register.

must be 16-aligned.

Special registers, after subtracting obj.RBaseARM, bit 9 indicates a special register and the low bits select the register.

-1 disables use of REGARG */.

compiler allocates R1 up as temps */ compiler allocates register variables R3 up */ compiler allocates external registers R10 down */.

these two registers are declared in runtime.h */.

scond byte */.

D_SHIFT type */.

scond byte */.

scond byte */.

http://infocenter.arm.com/help/topic/com.arm.doc.ihi0040b/IHI0040B_aadwarf.pdf.